fsl_dma: Fix Channel Start bug in dma_check()

The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests.  Previously, CS was being
set, not cleared.

Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.

Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>

diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index f3575af6d7103474b9c6890cb6c511f7a7955183..f05880230b4e2fdfcff61519951f0b3b9ebaa721 100644 (file)
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -60,7 +60,7 @@ static uint dma_check(void) {
        } while (status & FSL_DMA_SR_CB);
 
        /* clear MR[CS] channel start bit */
-       out_be32(&dma->mr, in_be32(&dma->mr) & FSL_DMA_MR_CS);
+       out_be32(&dma->mr, in_be32(&dma->mr) & ~FSL_DMA_MR_CS);
        dma_sync();
 
        if (status != 0)